A few more details on the difference between N channel and P channel output FETS. First up is the typical N channel output circuit. The circuitry that would normally be present to determine the continuity status is not shown.
This is very simple. The source of the FET is tied to ground and the control signal is applied to the gate. A resistor from gate to source keeps the gate from floating if the input is not driven. This can prevent some failure modes that would result in inadvertant firing of the output.
One thing to note is that FETs are controlled by their gate to source voltage. If this is below some threshold the FET is off. Above that threshold it is on. (There is of course a transition region where it is only partly on.) In this circuit the gate is driven by the control circuit so the gate to source voltage is not dependent on the pyro power supply.
Now the P channel version.
Now the source of the PFET (Q2) is tied to the positive voltage source. In order to turn it off the gate must be at the same voltage. Since microcontroller output voltage cannot exceed its supply, a driver circuit must be used to generate this high voltage. Here a simple NPN transistor is used. When Q1 is off, R2 pulls the gate of Q2 up. Since Vgs is zero, the FET is off. When Q1 is on, it pulls the gate down to ground. Vgs is now the difference between the supply voltage and ground.
If the supply has a high internal resistance, like an alkaline 9V battery, then when you pull current from it the voltage will drop. As a result Vgs will drop and the drain to source resistance of the FET will rise. This isn't a big problem until you start getting close to the threshold voltage. Once that happens the voltage across the FET (Vds) starts to rise and along with it, power dissipation.
Another thing about N and P channel FETS is that all else being equal, N channel devices will have a lower on resistance. This is because the charge carriers in N FETs are electrons which have higher mobility than the holes which are the charge carriers in P FETs.